Johnny's homebuilt 8080 CPU corner (and other stuff, maybe)

 

8080 CPU, built entirely by DTL-technology

This is my latest design of the CPU REGISTERS - a SLICE.

 

This one shown here is a prototype and will be used for bit 0 (after debugging). And I found a couple.

 

16 of these boards, plus 4 more ones for MUX-ing and 3-State buffering, is all there is to build the 8080 registers.

 

 

Update Jun 18, 2016 - All 16 register slices has been soldered and is up and running.

REGISTER SLICE

Schematics

MUX

The MUX is fairly simple, just as in the 74LS245 there is 2 crossing gates with some control logic.

Schematics

3-State Buffer

My 3-State buffer is based on 74LS366/368. Some component values is different (not by much) and the control logic is merley a single NOT gate (not shown here).

As long as CONTROL is HIGH the output i active. Pull it LOW and the output goes into 3-State.

 

The 74LS366 is an inverting buffer. I don't want that so I have put in an inverter (Q43 in the schematic below) to compensate.

At the time, it was easier than to bredboard the 74LS365 (non inverting).

 

Schematic

Here is the "blueprint".

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