8080 CPU, built using 74HC-logic
March 01, 2018
I now have a fully functional CPU hardware emulator that runs at 2 MHz, can execute all opcodes and also feature interrupt logic/functionality.
Top left are the CONTROL section.
To the right we have two sections, REGISTERS at top right and in front the ALU.
To the left I have attached a BUS system I call XBUS. On it there are a 64K SRAM and a memory editor that via RS232 can edit the SRAM. That pcb has been named RatNest.
The breadboard are a small testbed for the IN and OUT opcodes.
I will update these pages with more details as time permits.
To join the Homebuilt CPUs ring, drop Warren a line, mentioning your page's URL. He'll then add it to the list.
You will need to copy this code fragment into your page (or reference it.)
Note: The ring is chartered for projects that include a home-built CPU. It can emulate a commercial part, that′s OK.
But actually using that commercial CPU doesn′t rate. Likewise, the project must have been at least partially built: pure paper designs don′t rate either.
It can be built using any technology you like, from relays to FPGAs.